1. Technical Field
The present invention relates to a level shifter circuit, an integrated circuit device, and an electronic watch.
2. Background Technology
As semiconductor processes have evolved, it has become necessary to exchange data by connecting circuits that operate at different power supply voltages. At this time, a level shifter circuit for adjusting voltage levels is used to transmit the correct logic level.
For example, with a bulk type MOS integrated circuit, an active region is formed on a substrate or well region to constitute a MOS transistor. Meanwhile, with an SOI (Silicon-on-Insulator) type MOS integrated circuit, without using a well region, a large number of active regions are formed on an insulating thin film on a substrate to constitute MOS transistors on individual active regions.
Therefore, the SOI type MOS integrated circuit is fundamentally different from the bulk type MOS integrated circuit in terms of the element separation, and there is almost no junction capacitance or junction leakage with the substrate. With the SOI type, compared to the bulk type, lower voltage operation, lower power consumption, and higher speed operation are possible. For that reason, when signals are received from an SOI type integrated circuit device, the bulk type integrated circuit device adjusts the voltage level with a level shifter circuit. For example, the level shifter circuit of Patent Document 1 is used with the input terminal, and adjusts the level of the input voltage thereof.    Japanese Laid-open Patent Publication No. 2007-208714 (Patent Document 1) is an example of the related art.